From demoura at csl.sri.com Tue May 2 14:44:49 2006 From: demoura at csl.sri.com (Leonardo de Moura) Date: Tue May 2 14:44:43 2006 Subject: [SMTCOMP] WiSA benchmarks are available Message-ID: Hi, Hossein Sheini (University of Michigan) translated several Wisconsin Safety Analyzer (WiSA) benchmarks to the SMT-LIB format. These benchmarks are in the QF_UFLIA (uninterpreted functions + linear integer arithmetic) division. The benchmarks can be downloaded at: http://www.csl.sri.com/users/demoura/smt-comp/benchmarks.shtml Leonardo From rseba at dit.unitn.it Thu May 4 07:18:28 2006 From: rseba at dit.unitn.it (Roberto Sebastiani) Date: Thu May 4 07:18:45 2006 Subject: [SMTCOMP] PDPAR'06 Call for Papers Message-ID: <200605041418.k44EISEv014112@dit.unitn.it> [We apologize if you receive multiple copies of this announcement] ====================================================================== =================== Call for Papers ==================== FLOC'06/IJCAR'06 Workshop PDPAR 2006: 4th International Workshop on Pragmatics of Decision Procedures in Automated Reasoning http://dit.unitn.it/~rseba/pdpar06/ Seattle, Washington, USA August 21st, 2006 ====================================================================== Decision procedures are key components within many formal verification and automated reasoning tools. Their performance, capacity, and scalability are vital to the tools that depend on them. Furthermore, new extensions may allow the formal verification or automated reasoning tools to use decision procedures more effectively. The goal of this workshop is to bring together researchers interested in making new decision procedures possible, and old decision procedures more powerful and more useful. Sample topics of interest include: * New decision procedures * New methods of implementing decision procedures * New ways of using of the infrastructure common to decision procedures * Applications and case studies Important dates ~~~~~~~~~~~~~~~ Submission deadline : May 15, 2006 Notification of acceptance/rejection : June 9, 2006 Final version due : June 26, 2006 Workshop : August 21, 2006 Submission ~~~~~~~~~~ PDPAR will accept two types of papers: * Original papers: should describe original research and contain sufficient detail to assess the merits and relevance of the contribution. Simultaneous submission of material is prohibited. Given the informal style of the workshop, the submission of papers presenting student's work and work in progress is encouraged. * Presentation-only papers: describe work previously published in non-FLOC'06 forums, and will *not* be inserted in the proceedings. We are allowing the submission of previously published work in order to allow researchers to communicate good ideas that the PDPAR attendees are potentially unaware of. Both kind of submissions will be reviewed by at least two referees, possibly more. Further information about how to submit papers will be made available at the workshop's web page. Proceedings ~~~~~~~~~~~ Given the informal style of the workshop only informal (non-archival) proceedings will be distributed at the workshop. A selected subset of the submitted papers will be published as post-proceedings in a special volume of the Electronic Notes in Theoretical Computer Science (ENTCS) (unless the authors prefer not to). Presentations ~~~~~~~~~~~~~ The authors of accepted submissions are expected to give a presentation at the workshop. They will be asked for the files of their presentations, which will be made available on the workshop's web page after the workshop. Program Chairs ~~~~~~~~~~~~~~ Byron Cook, Microsoft Research Roberto Sebastiani, Universita` di Trento Program Committee ~~~~~~~~~~~~~~~~~ Alessandro Armando, Universita` di Genova Clark Barrett, New York University Alessandro Cimatti, ITC-Irst, Trento Leonardo de Moura, SRI International Niklas Een, Cadence Design Systems Daniel Kroening, ETH-Zurich Shuvendu Lahiri, Microsoft Research Robert Nieuwenhuis, Technical University of Catalonia Silvio Ranise, LORIA, Nancy Eli Singerman, Intel Corporation Ofer Strichman, Technion Aaron Stump, Washington University Cesare Tinelli, University of Iowa Ashish Tiwari, Stanford Research Institute (SRI) From tinelli at cs.uiowa.edu Wed May 10 12:37:16 2006 From: tinelli at cs.uiowa.edu (Cesare Tinelli) Date: Wed May 10 12:37:28 2006 Subject: [SMTCOMP] new quantified benchmarks Message-ID: <446240EC.10705@cs.uiowa.edu> Hi all, courtesy of Bernd Fischer (who provided them) and Yeting Ge (who translated them into CVC format) we will soon have about 28,000 quantified benchmarks over a theory combining integers, reals, arrays and free symbols. FYI, here is a formalization of the theory and related logic. We anticipate that the logic will become a division in SMT-COMP. Best, Clark and Cesare ------------------------------------------------- (theory ArrayIntArrayIntReal :written_by {Cesare Tinelli} :date {10/05/05} :sorts (Int Array1, Array2) :funs ((0 Int) (1 Int) (- Int Int) ; unary minus (- Int Int Int) ; binary minus (+ Int Int Int) (* Int Int Int) :preds ((<= Int Int) (< Int Int) (>= Int Int) (> Int Int) ) :funs ((0.0 Real) ; requires extending SMT-LIB grammar (1.0 Real) ; requires extending SMT-LIB grammar (- Real Real) ; unary minus (- Real Real Real) ; binary minus (+ Real Real Real) (* Real Real Real) ) :preds ((<= Real Real) (< Real Real) (>= Real Real) (> Real Real) ) :funs ((select Array1 Int Real) (store Array1 Int Real Array1) (select Array2 Int Array1) (store Array2 Int Array1 Array2) ) :definition "This is a theory of functional arrays (with extensionality) with sort name Array1, integer indeces and real elements, plus arrays with sort name Array2, integer indeces and Array1 elements. It can be formally defined as the union of the following variants of the SMT-LIB theories Int and ArraysEx produced by these signature morphisms: - the trivial variant of Int produced by the identity morphism; - the variant of Real produced by the morphism mapping 0 to 0.0 and 1 to 1.0, and every other symbol to itself; - the variant of ArraysEx produced by the morphism mapping Index to Int, Element to Real, and every other symbol to itself; - the variant of ArraysEx under the morphism mapping Index to Int, Element to Array, and every other symbol to itself; " ) (logic AUFLIRA :written_by {Cesare Tinelli} :date {10/05/2006} :theory ArrayIntArrayIntReal :language "Closed formulas built over an arbitrary expansion of the ArrayIntArrayIntReal signature with free function and predicate symbols but containing only linear atoms, that is, atoms with no occurrences of the function symbol * (but see the notational conventions below). Formulas in ite terms must satisfy the same restriction, with the exception that they need not be closed. " :extensions "As in the logic QF_LIA and QF_LRA, with difference that numerals for real numbers must end with .0 (as in 5.0)." From barrett at courant.nyu.edu Wed May 17 10:07:04 2006 From: barrett at courant.nyu.edu (Clark Barrett) Date: Wed May 17 10:54:07 2006 Subject: [SMTCOMP] Announcing SMT-COMP 2006 Message-ID: <200605171707.k4HH7440030732@zaphod.cs.nyu.edu> Please distribute. Apologies for multiple postings... =========================================================================== CAV'06 Satellite Event 2nd International Satisfiability Modulo Theories Competition (SMT-COMP'06) Seattle, Washington, USA August 16-20, 2006 CALL FOR BENCHMARKS CALL FOR ENTRANTS =========================================================================== Decision procedures for checking satisfiability of logical formulas are crucial for many verification applications. Of particular recent interest are solvers for Satisfiability Modulo Theories (SMT). SMT-COMP aims to spur innovation in SMT research by providing a yearly friendly competition for SMT solvers. SMT-COMP came out of discussions surrounding the SMT-LIB initiative, an initiative of the SMT community to build a library of SMT benchmarks in a proposed standard format. SMT-COMP helps serve this goal by contributing collected benchmark formulas used for the competition to the library, and by providing an incentive for implementors of SMT solvers to support the SMT-LIB format. The methodology and the results of the competition will be presented at the end of CAV, and a more detailed discussion of the competition will take place in a special SMT-COMP meeting which will take place on the evening of August 20. For more information, please see the SMT-COMP web page at http://www.csl.sri.com/users/demoura/smt-comp/ --------------- Benchmarks --------------- The potential benchmark divisions for this year will include all of the divisions represented last year as well as several new ones. For detailed descriptions of the divisions, refer to the SMT-LIB web page at http://goedel.cs.uiowa.edu/smtlib/ * QF_UF (Uninterpreted Functions): This division consists of quantifier-free formulas whose satisfiability is to be decided modulo the empty theory. Each benchmark may introduce its own uninterpreted function and predicate symbols. * QF_IDL (Integer Difference Logic): This division consists of quantifier-free formulas to be tested for satisfiability modulo a background theory of integer arithmetic. The syntax of atomic formulas is restricted to difference logic, i.e. x - y op c, where op is either equality or inequality and c is an integer constant. * QF_RDL (Real Difference Logic): This division is like QF_IDL, except that the background theory is real arithmetic. * QF_UFIDL (Integer Difference Logic with Uninterpreted Functions): This division contains benchmarks in a logic which is similar to QF_IDL, except that it also allows uninterpreted functions and predicates. * QF_LIA (Linear Integer Arithmetic): This division consists of quantifier-free formulas to be tested for satisfiability modulo a background theory of integer arithmetic. The syntax of atomic formulas is restricted to contain only linear terms. * QF_LRA (Linear Real Arithmetic): This division is like QF_LIA, except that the background theory is real arithmetic. * QF_UFLIA (Linear Integer Arithmetic with Uninterpreted Functions): This division contains benchmarks in a logic which is similar to QF_LIA, except that it also allows uninterpreted functions and predicates. * QF_UFLRA (Linear Real Arithmetic with Uninterpreted Functions): This division contains benchmarks in a logic which is similar to QF_LRA, except that it also allows uninterpreted functions and predicates. * QF_A (Arrays): Quantifier-free formulas over the theory of arrays (with extensionality). * QF_AUFLIA (Linear Integer Arithmetic with Uninterpreted Functions and Arrays): This division consists of quantifier-free formulas to be tested for satisfiability modulo a background theory combining linear integer arithmetic, uninterpreted function and predicate symbols, and extensional arrays. * QF_UFBV[32] (Bit-vectors and Uninterpreted Functions) Unquantified formulas over bit vectors of size up to 32 bits, with unintepreted function, and predicate symbols. * AUFLIA: (Linear Integer Arithmetic with Uninterpreted Functions and Arrays) This division consists of formulas with quantifiers to be tested for satisfiability modulo a background theory combining linear integer arithmetic, uninterpreted function and predicate symbols, and extensional arrays. * AUFLIRA: (Arrays, Uninterpreted Functions, and Linear Arithmetic) This division consists of formulas with quantifiers, arrays of reals indexed by integers (Array1), arrays of Array1 indexed by integers (Array2), and linear arithmetic over the integers and reals. This division is included to accommodate a large number of quantified verification benchmarks that have become available. As with last year, we reserve the right to remove benchmark divisions if we do not receive enough quality benchmarks or enough solvers in a particular division. If you have access to benchmarks in any of these divisions, even if they are not in the SMT-LIB format, please contact one of the organizers (see below). --------------- Solvers --------------- Please refer to http://www.csl.sri.com/users/demoura/smt-comp/ for complete details on entering the competition. --------------- Important Dates --------------- * June 1: First version of the benchmark library posted for comment. * July 1: Revised version of the benchmark library posted. Pseudo-random benchmark selector becomes available. * August 1: Final version of the benchmark library posted, and system submission opened. * August 8: Final system description due, with magic numbers for pseudo-random selection of benchmarks. * August 9: Selected benchmarks posted. * August 16: Competition begins, coinciding with the start of CAV. ----------------- Organizers ----------------- Clark Barrett (New York University, barrett@cs.nyu.edu) Leonardo de Moura (SRI International, demoura@csl.sri.com) Aaron Stump (Washington University in St. Louis, stump@cse.wustl.edu) ---------------- More Information ---------------- For details on the competition, see http://www.csl.sri.com/users/demoura/smt-comp/ For more information on the smt-lib format, see http://goedel.cs.uiowa.edu/smtlib/ From demoura at csl.sri.com Tue May 30 10:10:25 2006 From: demoura at csl.sri.com (Leonardo de Moura) Date: Tue May 30 10:10:27 2006 Subject: [SMTCOMP] First version of the benchmark library is available Message-ID: <86052EB0-760B-4F6E-B456-3BCCF5C7D901@csl.sri.com> Hi, The first version of the benchmark library for SMT-COMP'06 is available at: http://www.csl.sri.com/users/demoura/smt-comp/benchmarks.shtml The benchmarks are available also in the SMT-LIB webiste: http://goedel.cs.uiowa.edu/smtlib/ It includes the benchmarks from last year, the benchmarks posted in the past months, and two new sets of benchmarks (cellar and smtlib-predabs) sent by Albert Oliveiras. Both sets are derived from realistic applications of SMT solvers. A revised version of the benchmark library will be posted on July 1st. If you have SMT benchmarks, then this is a good time to submit them. Best wishes, Leonardo de Moura for Aaron Stump and Clark Barrett From demoura at csl.sri.com Tue May 30 10:22:27 2006 From: demoura at csl.sri.com (Leonardo de Moura) Date: Tue May 30 10:22:30 2006 Subject: [SMTCOMP] SMT-COMP pre-registration and submission is now open Message-ID: <3DE7AFE6-9036-4342-AB76-3A4FB442BB41@csl.sri.com> Hi, SMT-COMP pre-registration and submission is now open. Additional information is available at: http://www.csl.sri.com/users/demoura/smt-comp/registration.shtml Please pre-register as soon as possible, we need this information to decide the number of machines we are going to need, how many benchmarks and the timeout we are going to use. The deadline for system submission is 8th of August. Best wishes, Leonardo de Moura for Aaron Stump and Clark Barrett